SiC and GaN have a wider band gap than Si, and they can withstand both high-temperature and high-frequency operation. The SiC and GaN can reduce power loss and overall downsize the power electrical equipment. Operation temperature of SiC power modules may achieve above 250℃ due to higher power application. Ag sinter joining is becoming an important interconnection technology for die attach in power electronics. It exhibits superior process ability, high-temperature resistance, and long-time durability to traditional connection methods such as solder joining or conductive adhesive joining. Massive works have demonstrated Ag sinter paste can achieve a robust and reliable die attach with the Ag finished substrate under a mild sintering condition (pressure-less, low temperature and atmospheric sintering). However, Ag sinter paste only on the Ag surface metallization is inadequate since there are industrial demands of different surface metallization layers for specific applications or cutting fabrication costs. Currently, few works have realized robust die attach on different surface metallization layers via Ag sinter paste under the mild sintering condition, and there is still a lack of the systematic investigation on the bonding quality and thermal aging reliability of die attach with Ag sinter paste on different metal metallization layer, such as on Ag, Au, Cu and Al surface. In this presentation, the bonding quality, thermal aging reliability, and bonding mechanism Ag sinter paste on different metal interface were introduced for a comprehensive understanding of SiC power modules by Ag sinter paste joining in high temperature applications.

Chuantong Chen (IEEE senior number), received the Ph.D degree in mechanical engineering from Nagoya Institute of Technology, Japan, in 2015. From 2016 to 2019, he was an assistant professor at Institute Scientific and Industrial Research, Osaka University, Japan. He became to an associate professor in Osaka University from 2020. His research interest includes surface and interface materials, lead-free soldering, Ag sinter joining, Nano-joining, 3D packaging, and power electronics packaging. He has published more than 120 SCI journal papers and 80 IEEE conference papers in above fields. Prof. Chen was a recipient of some awards and honors including the IEEE EMPC Best poster award, IEEE ICEP Outstanding Technical paper Award in 2023, and the IEEE CPMT Japan Chapter Young in 2019. He also applied and obtained 20 Japanese and international patents, including 3 US patents. Prof. Chen serves as technology committee member of IEEE ICEPT from 2020, and IEEE ICEP from 2024, and serves as the committee member of Kansai branch of the Japanese Electronics Packaging Society, and a committee member of international standardization for the third-generation semiconductor packaging substrate material, interconnections, heat conduction evaluation system and equipment in Japan from 2018.